Date(s) - 01/03/2017
10:00 am - 11:00 am
In this talk, I will report on two recent results of my work on data processing on modern hardware.
First, I will demonstrate what we can do as a software community to improve the energy efficiency of modern multi-core systems. I will argue that the best energy/performance trade-off can be achieved by bringing the system into a balanced configuration, where the engine’s processing speed matches the memory bandwidth of the platform.
In the second part of my talk, I will show a way how field-programmable gate arrays (FPGAs) can be integrated into Big Data systems. I will present “Rosetta”, which is a compiler to generate FPGA circuits. Rosetta accepts the specification of a language — say, a data format —, together with an action code that describes processing tasks to perform with data in that language. It’s output is a data processor that can run the given processing task in real hardware, often at wire speed. An intended use case of “Rosetta” is the pre-processing of data, e.g., in Big Data systems.
Jens Teubner is leading the Databases and Information Systems Group at TU Dortmund University, Germany. His main research interest is data processing on modern hardware platforms, including FPGAs, multi-core processors, and hardware-accelerated networks. Previously, Jens Teubner was a postdoctoral researcher at ETH Zurich (2008 – 2013) and IBM Research (2007 – 2008). He holds a PhD in Computer Science from TU München (Munich, Germany) and an M.S. degree in Physics from the University of Konstanz, Germany.